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          Latest RISC-V Articles and Videos

          Categories

          RISC-V Celebrates 10 Years of Open-Source ISA

          On the heels of RISC-V’s 10th birthday, let's explore the history of RISC-V from its inception to today.

          August 25, 2020 by Jake Hertz

          Ultrasound Receiver Architecture Undergoes a Seismic Shift

          Ultrasound, with nearly a century of technological history, has seen its third major technological breakthrough coming out of North Carolina State.

          August 20, 2020 by Adrian Gibbons

          Architecture and Design Techniques of Op-Amps

          In this video we will examine the internal circuitry of an operational amplifier. A thorough analysis of any professional-quality op-amp would be far too complicated for an introductory video tutorial, but if we focus on the overall architecture and a few specific design techniques, we can learn quite a bit about op-amp functionality without getting lost in the details.

          August 02, 2020 by Robert Keim

          SiFive, Co-Founder of RISC-V, Unveils Major Upgrades to RISC-V-Based Processors

          As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.

          July 25, 2020 by Vanessa Samuel

          Revolutionizing Telecommunications Applications with Chip-Based Microcombs

          Laser frequency combs small enough to fit on an IC have significant implications for frequency measurement and communications.

          June 26, 2020 by Gary Elinoff

          A New Partnership Brings Professional Dev Tools to RISC-V Microcontrollers

          The joint efforts of GigaDevice and IAR Systems may speed the development time when working with RISC-V.

          June 04, 2020 by Gary Elinoff

          ISP in a Box: Althea Reimagines Mesh Network Systems

          It all starts with firmware that runs a routing protocol, allowing routers to pay each other for bandwidth and automate network configuration.

          May 22, 2020 by Kayla Matthews

          The International Telecommunication Union Announces a New Architecture That Incorporates MI Mechanisms

          Recently, a study into the architecture has been presented by members of the Wireless Networking and AI&ML research groups and described as a “new standard” for telecommunications networks.

          May 21, 2020 by Luke James

          COVID-19 Puts Spotlight on Open-Source RISC-V Cores, IP

          Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.

          May 20, 2020 by Antonio Anzaldua Jr.

          RISC-V International Partners with GlobalPlatform to Simplify Security Design for IoT Devices and Processors

          The collaboration is fuelled by the desire to develop open-source standards that simplify security design for hardware developers and enhance the security of IoT devices.

          May 15, 2020 by Luke James

          Neural Network Architecture for a Python Implementation

          This article discusses the Perceptron configuration that we will use for our experiments with neural-network training and classification, and we’ll also look at the related topic of bias nodes.

          January 09, 2020 by Robert Keim

          OpenHW Group Announces Multi-core Evaluation SoC Based on the NXP iMX Platform

          The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.

          December 13, 2019 by Cabe Atwell

          Microchip Announces First RISC-V-based SoC FPGA to Use Half the Power of Other FPGAs

          Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.

          December 10, 2019 by Lisa Boneta

          AI Hardware Built from a Software-first Perspective: Groq’s Flexible Silicon Architecture

          Groq, a semiconductor startup with software roots, has developed a new processing unit with a unique architecture that offers inference solutions for AI acceleration.

          December 03, 2019 by Majeed Ahmad

          How RISC-V Security Stacks Strengthen Computer Architecture

          In this article, Ted Speers of Microchip reflects on how RISC-V and its security stack offer a solution for the development of computer architecture and processor security.

          November 26, 2019 by Ted Speers, Microchip

          Microchip Dual Core Digital Signal Controllers | New Product Brief

          This New Product Brief (NPB) is part of a video series highlighting the features, applications, and technical specs of newly-released products.

          October 29, 2019 by Mouser Electronics

          Learn About SAR ADCs: Architecture, Applications, and Support Circuitry

          In this article, we’ll first review the basic architecture of a SAR ADC and then take a look at one of its common applications.

          October 24, 2019 by Steve Arar

          The Journey of RISC-V Implementation

          In this article, Western Digital's Ted Marena explores the reasons companies have and the process they go through when integrating the open process instruction set architecture RISC-V.

          September 10, 2019 by Ted Marena, Western Digital

          Alibaba’s Semiconductor Subsidiary Will Utilize Open-Source RISC-V Core

          Alibaba is set to produce the next generation of Chinese processors with the RISC-V instead of Arm architecture.

          July 29, 2019 by Robin Mitchell

          RISC-V’s Role in Securing IoT-Connected Devices

          RISC-V hardware offers additional security for IoT-connected embedded devices beyond software cybersecurity.

          July 23, 2019 by Jothy Rosenberg, Dover Microsystems

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